San Jose, CA – July 13, 2010 - Olympus Integrated Technologies America, Inc. (Olympus-ITA) will present its 3D-IC Automated Metrology System at SEMICON West 2010 in North Hall booth #6047. The system provides precise imaging technology to verify alignment of bonded wafers and through silicon vias (TSV). Alignment is critical for the device to function optimally.

The 3D interconnect process using TSVs requires bonding the active side of processed wafers together. Once the wafers are bonded there is an immediate need to verify the accuracy of the bonding alignment, but the active wafer surfaces containing the alignment targets are no longer visible. The Olympus IR 3D-IC Metrology System allows observation and image acquisition of the alignment targets and vias by "seeing” through up to 1200µm of bulk silicon to the patterned surfaces. Overlaid alignment marks are imaged and measured to verify bonding alignment accuracy. IR microscopy is a non-destructive technique, making it especially suited to in-line metrology for the bonded wafer pairs and dies required for 3D interconnects.

"As has been previously presented by Andrew Rudack of SEMATECH*, IR microscopy can be used as an early indicator of electrical yield in bonded wafer pairs used for 3D integration," said Greg Baker, Olympus-ITA president. "Overlay metrology using IR microscopy can immediately follow the wafer bonding process and be used to predict yields at this early stage in the 3D interconnect process, providing substantial savings in manufacturing costs."

Olympus-ITA will also present a paper with SEMATECH and the College of Nanoscale Science and Engineering, University at Albany titled IR Microscopy for Overlay and Defect Metrology of 3D Interconnect Bonded Wafers. The paper will be part of the Advanced Metrology session at the ASMC Technical Conference on Tuesday, July 13, 2010 at the San Francisco Marriott in San Francisco, CA. ASMC is held in conjunction with SEMICON West which is being held from July 13-15 at the Moscone Convention Center, San Francisco.

Photo: 3D-IC Metrology System

About Olympus-Integrated Technologies America
Olympus Integrated Technologies America, Inc. (Olympus-ITA) is a wholly owned subsidiary of the Olympus Corporation of the Americas. Olympus-ITA has many years experience in semiconductor products and systems for wafer inspection and defect review and is on the forefront of technology with its new IR inspection system for 3D interconnect. Its location in San Jose, California, enables the company to respond quickly to provide sales, service, and support to semiconductor companies throughout the United States. For more information contact Greg Baker at 408-514-3918, email info@olympus-ita.com, or visit our website at www.olympus-ita.com.

* SPIE Conference, San Jose, California, February 2010, Conference Title: Metrology, Inspection, and Process Control for Microlithography XXIV, IR microscopy as an early electrical yield indicator in bonded wafer pairs used for 3D integration, Andrew C. Rudack, Pratibha Singh, J.Christopher Taylor, Vadim Mashevsky. Proc. SPIE, Vol. 7638, 763815 (2010); doi:10.1117/12.848400.